PANEL VOLTAGE AND THERE
TESTING POINT
VON= VGH=VGON=VDDG=20v to 30v
Gate-On Supply. VON is the
positive supply voltage for the CKV_, CKVB_, and STVP high-voltage driver
outputs.
This VGH (VGate High) voltage
was generated by DC-DC circuits. And their voltage is about 20V ~30V but it
will depends on the T-con board design. The feature of VGH voltage is to supply
to the Gate Driver Board as a “Switch ON” feature.
VOFF= VGL=VGOFF=VEEG= -5v to
-9v
Gate-Off Supply. VOFF is the
negative supply voltage for the CKV_, CKVB_, and STVP high-voltage driver
outputs.
The VGL (VGateLow) voltage was
generated by the DC-DC section too. Some T-con board will use a higher voltage
as -15V or a lower voltage as -1V. So it will depend on the T-con design and
it’s not much on the market. Typically is -5V~ -7V. This negative voltage is
supply to Gate Driver Board. The VGL voltage is as “Switch Off” feature. When
VGL negative voltage is supply.
VDD= Vlogic=Vddd=Dvdd=3.3v
Supply Input. VDD is the logic
supply input for the scan driver.This VDD voltage is output from the DC-DC IC
or using an external Voltage Regulator IC to generate. It is 3.3V and other
voltages like 2.5V (VDD25) and 1.8V (VDD18) was using the VDD 3.3V voltage to
convert. After VDD voltage generate it is supply to Timing Control section,
Source Driver Board and Gate Driver Board.
VDA= Avdd=Vdda=Vsource=13v to
20v
This VDA voltage is about 14V
~20V and it will depends on their T-con board design. The VDA voltage is
generated by DC-DC Converter circuits. It is use to supply to the GAMMA
circuits and reaching to the Source Driver Board
VCOM =5.5v to 8.5v
half of the avdd suply is
supply use for control pixel brightness
STV=squre wave signal having
frequency is 92.72khz
Vertical Sync Input. The
rising edge of STV begins a frame of data. The STV input is used to generate
the high-voltage STVP output.
STVP
High-Voltage Scan-Drive
Output. STVP is connected to VOFF when STV is low and is connected to VON when
STV is high and CPV1 is low. When both STV and CPV1 are high, STVP is high
impedance
CPV1
CPV (Clock Pulse Vertical)
-Vertical Clock Pulse Input. CPV1 controls the timing of the CKV1 and CKVB1
outputs, which change state (by first sharing charge) on its falling edge.
CKV1
CKV( Clock Signal)-
High-Voltage Scan-Drive Output. When enabled, CKV1 toggles between its high
state (connected to VON) and its low state (connected to VOFF) on each falling
edge of the CPV1 input. Further, CKV1 is high impedance whenever CPV1 and STV
are both low.
CKV2
High-Voltage Scan-Drive
Output. When enabled, CKV2 toggles between its high state (connected to VON)
and its low state (connected to VOFF) on each falling edge of the CPV2 input. Further,
CKV2 is high impedance whenever CPV2 and STV are both low.
Title : lcd led panel voltage and there point
Description : PANEL VOLTAGE AND THERE TESTING POINT VON= VGH=VGON=VDDG=20v to 30v Gate-On Supply. VON is the positive supply voltage for the CKV_,...
